An innovative second-order delta-sigma coder employing streamlined CMOS push-pull amplifiers as gain elements combined with a high-speed bistable circuit for precision analog modulation.
Converts high-speed modulated bitstreams into standard Pulse Code Modulated (PCM) words using a partial coefficient generator with optimized silicon logic.
Distributes accumulator arithmetic across stages running at reduced clock speeds, drastically minimizing power consumption and heat dissipation.
Engineered specifically for high-yield CMOS chip integration, consolidating the complete high-accuracy ADC subsystem onto a compact die area.
A built-in multiplexer produces synchronized serial data words for direct, low-pin-count interfacing with microcontrollers and digital processors.